eprintid: 362 rev_number: 13 eprint_status: archive userid: 32 dir: disk0/00/00/03/62 datestamp: 2011-06-10 13:21:13 lastmod: 2011-07-11 14:36:27 status_changed: 2011-06-10 13:21:13 type: book_section metadata_visibility: show item_issues_count: 0 creators_name: Fantechi, Alessandro creators_name: De Nicola, Rocco creators_name: Gnesi, Stefania creators_name: Larosa, Salvatore creators_name: Ristori, Gioia creators_id: creators_id: r.denicola@imtlucca.it creators_id: creators_id: creators_id: title: Verifying hardware components within JACK ispublished: pub subjects: QA75 divisions: CSA full_text_status: none abstract: JACK (the acronym for Just Another Concurrency Kit) is a workbench integrating a set of verification tools for concurrent system specifications, supported by a graphical interface offering facilities to use these tools separately or in combination. The environment offers several functionalities to support the design, analysis and verification of systems specified using process algebras. In this paper we use JACK to formally specify the hardware components of a buffer system. Then we verify, by using the checking capabilities of JACK, the correctness of the specification with respect to some safety requirements, expressed in the action based temporal logic ACTL. date: 1995 date_type: published series: Lecture Notes in Computer Science volume: 987 publisher: Springer pagerange: 246-260 id_number: 10.1007/3-540-60385-9_15 refereed: TRUE isbn: 3-540-60385-9 book_title: Correct Hardware Design and Verification Methods (CHARME 1995) editors_name: Camurati, Paolo editors_name: Eveking, Hans official_url: http://dx.doi.org/10.1007/3-540-60385-9_15 funders: The work described was partially performed within the LAMBRUSCO project supported by C.N.R., under the Progetto Finalizzato Sistemi Informatici e Calcolo Parallelo funders: and within the Progetto Coordinato C.N.R. Specifica ad Alto Livello e Verifica Formale di Sistemi Digitali. citation: Fantechi, Alessandro and De Nicola, Rocco and Gnesi, Stefania and Larosa, Salvatore and Ristori, Gioia Verifying hardware components within JACK. In: Correct Hardware Design and Verification Methods (CHARME 1995). Lecture Notes in Computer Science, 987 . Springer, pp. 246-260. ISBN 3-540-60385-9 (1995)